Tobias John
Instruction Timing Analysis for Linux/x86-based Embedded and Desktop Systems
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Hinweis
Bitte nutzen Sie beim Zitieren immer folgende Url:
http://nbn-resolving.de/urn:nbn:de:swb:ch1-200501401
Kurzfassung in Englisch
Real-time aspects are becoming more important in
standard desktop PC environments and x86 based
processors are being utilized in embedded systems
more often.
While these processors were not created for use
in hard real time systems, they are fast and
inexpensive and can be used if it is possible
to determine the worst case execution time.
Information on CPU caches (L1, L2) and
branch prediction architecture is necessary
to simulate best and worst cases in execution
timing, but is often not detailed
enough and sometimes not published at all.
This document describes how the underlying
hardware can be analysed to obtain
this information.
weitere Metadaten
| Schlagwörter | branch prediction |
| Schlagwörter | cache architecture |
| SWD Schlagworte | Analyse |
| SWD Schlagworte | Benchmark |
| SWD Schlagworte | Cache-Speicher |
| SWD Schlagworte | LINUX |
| SWD Schlagworte | Timing |
| DDC Klassifikation | 004 |
| Institution(en) | |
| Hochschule | TU Chemnitz |
| Fakultät | Fakultät für Informatik |
| Hochschule | TU Chemnitz |
| Fakultät | Fakultät für Elektrotechnik und Informationstechnik |
| Betreuer | Dr. Robert Baumgartl |
| Gutachter | Prof. Peter Protzel Dr. Robert Baumgartl |
| Dokumententyp | Diplomarbeit |
| Sprache | Englisch |
| Tag d. Einreichung (bei der Fakultät) | 22.09.2005 |
| Veröffentlichungsdatum (online) | 19.10.2005 |
| persistente URN | urn:nbn:de:swb:ch1-200501401 |